Atmel AVR

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Image:Atmel avr logo.pngThe AVRs are a family of RISC microcontrollers from Atmel. Their internal architecture was conceived by two students: Alf-Egil Bogen and Vergard Wollan, at the Norwegian Institute of Technology (NTH)Template:Ref and further refined and developed at Atmel Norway, a subsiduary founded by the AVR's architects.

The AVR is a Harvard architecture machine with programs and data stored separately. Program instructions are stored in semi-permanent Flash memory which then loads and manipulates data in the volatile SRAM. The AVRs have thirty-two single-byte registers. Some instructions only operate on a subset of these registers. The lower sixteen registers are limited and cannot be used for most immediate instructions and the top six registers are used primarily as three two-byte address pointers. Leaving ten registers to do the bulk of the processing.

The registers, input/output ports and static RAM make up the data address space. The working registers are mapped in as the first thirty-two memory spaces followed by the I/O ports. The actual usable RAM starts at memory location 100(hex). The top of this user SRAM is also where the stack is typicaly implimented.

The AVRs were originally designed for the efficient execution of compiled C code and hence the top six working registers: R26 to R31, are typically used as three two-byte address pointers referred to as the X, Y & Z registers, through which indirect memory accessing is done.

Due to the size constraints of the original design, some instructions such as add immediate were left out which leads to some awkward statements like SUBI TMP,(-2) which subtracts negative two, resulting in the addition of two; a double negative. This substitution works well in most cases with the notable exception of SUBI 0 which does not perform an add zero correctly. Adding zero is used often to add-forward the carry from a previous addition in multi-byte arithmatic.

Atmel's AVRs have a two-stage pipeline design. The next machine instruction is being fetched as the current one is executing. Most instructions take just one or two clock cycles, making AVRs relatively fast among the eight-bit microcontrollers.

They are marketed under various names that share the same basic core but with different peripheral and memory combinations: from the Tiny ATtiny11 with 1Kilobyte of flash, no SRAM, and only eight pins, at the small end of the scale; up to the Mega ATmega2560 with 256K of Flash, 8K SRAM, 4K EEPROM, ADCs, timers, ADCs comparators, JTAG, et al. Compatibility amongst chips throughout this spectrum is fairly good.

The AVR instruction set is more orthogonal than most eight-bit microcontrollers, however, it is not completely regular:

Pointer registers X, Y, and Z have addressing capabilities that are different from each other.
Register locations R0 to R15 have different addressing capabilities than register locations R16 to R31.
I/O ports 0 to 31 have different addressing capabilities than I/O ports 32 to 63.
CLR affects flags, while SER does not, even though they are complementary intructions. CLR set all bits to zero and SER sets them to one.
Opcodes 0x95C8 & 0x9004 do same thing: LPM (Load from Program Memory)

AVRs have a large dedicated hobbyist following and a Forum: AVRFreaks. The popularity is probably due to the many free and inexpensive development tools available, including reasonably priced development boards and a free Assembler and GNU GCC software tools.

The acronym AVR has been reported to stand for Advanced Virtual RISC. It's also been rumoured to stand for the initials of the company's founders: Alf-Egil Bogen and Vegard Wollan, who would rather the matter rest unresolved, being evasive when questioned about it directly. If true, one has to wonder who the "R" stands for.

1 Features
2 Footnotes
3 See also
4 Atmel Official Links
5 AVR Forums & Discussion Groups
6 Machine Language Development
7 C Language Development
8 BASIC & Other AVR Languages
9 AVR Butterfly Specific
10 Other AVR Links

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Features

Current AVRs offer a wide range of features:

RISC Core Running Many Single-Cycle Instructions
Multifunction, Bi-directional I/O Ports with Internal, Configurable Pull-up Resistors
Internal Oscillators
Internal Instruction Flash Memory up to 256K
Internal Data EEPROM up to 4KB
Internal SRAM up to 8K
8-Bit and 16-Bit Timers
PWM Channels
Dedicated I2C Compatible Two-Wire Interface
Synchronous/Asynchronous Serial Peripherals (UART/USART)
Analog Comparitors
10-Bit A/D Converters
Brownout Detection
Watchdog Timer
Low-voltage Devices Operating Down to 1.8v
Universial Serial Interface for Two-Wire, Three-Wire Synchronous Data Transfer
picoPower Devices
CAN Controller Support
Lighting (PWM Specific) Devices
USB Controller Support
LCD Controller Support
Ethernet Controller Support
Smart Battery Line
Power-Saving, Configurable Sleep Modes