Fanout
From Free net encyclopedia
Fanout is a measure of the ability of a logic gate output, implemented electronically, to drive a number of inputs of other logic gates of the same type. In most designs, logic gates are connected together to form more complex circuits, and it is common for one logic gate output to be connected to several logic gate inputs. The technology used to implement logic gates usually allows gate inputs to be wired directly together with no additional interfacing circuitry required.
A perfect logic gate would have infinite input impedance and zero output impedance, allowing a gate output to drive any number of gate inputs. However, since real-world fabrication technologies exhibit less than perfect characteristics, in reality a limit will be reached where a gate output cannot drive any more current into subsequent gate inputs - attempting to do so causes the voltage to fall below the level defined for the logic level on that wire, causing errors.
The fanout is simply the number of gate inputs that can be connected before this occurs.
CMOS logic has a very high fanout, at least 50 to 100, whereas the older TTL logic gates were limited to perhaps 2 to 10, depending on the type of gate. Fanout is also dependent on speed, particularly for the CMOS types, because the input impedance of a gate is largely capacitive and therefore reduces with increasing frequency*. This effect is less marked for TTL systems, which is one reason why they maintained a speed advantage over CMOS for many years.
- Note that the input impedance is largely capacitive and therefore reduces with *decreasing physical size of the cmos gate*, not really with increasing frequency. Increasing frequency however does correlate directly with decreasing gate size.
A related term is "fanin", which is the number of inputs of a logic gate.
<math>Fanout = \lfloor\frac{I_{out}}{I_{in}}\rfloor</math>
(<math>\lfloor\;\rfloor</math> is the floor function).
See also
- FO4 - Fanout of 4