Register Transfer Language
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Register Transfer Language (RTL) has two meanings in computer science. The first is an intermediate representation used by the GCC compiler. Register Transfer Language also refers to a language that defines precisely what each instruction in a processor does, to a level of detail that allows synthesis of the hardware. The acronym RTL is also used for register transfer level, an attribute of a hardware description language.
Intermediate Compiler Representation
RTL is used to represent the code being generated, in a form closer to assembly language than to the high level languages which GCC compiles.
RTL is generated from the GCC Abstract Syntax Tree representation, transformed by various passes in the GCC 'middle-end', and then converted to assembly language. GCC currently uses the RTL form to do a part of its optimisation work.
RTL is usually written in a form which looks like a Lisp S-expression:
(set:SI (reg:SI 140) (plus:SI (reg:SI 138) (reg:SI 139)))
This 'side-effect expression' says 'add register 138 to register 139, and store the result in register 140'.
The RTL generated for a program is different when GCC generates code for different processors. However, the meaning of the RTL is more-or-less independent of the target: it would usually be possible to read and understand a piece of RTL without knowing what processor it was generated for. Similarly, the meaning of the RTL doesn't usually depend on the original high-level language of the program.
Hardware Description Language
Register Transfer Level (RTL) refers to a hardware description language used to describe the operation of instructions within a processor. RTL describes the requirements of data and control units in terms of digital logic to execute the desired operations. Each instruction from the architecture's instruction set, is defined in detail in the RTL. The resulting modules are sufficiently defined to allow the actual wiring of processor circuits to be derived. Since only the logical operations are defined, you still need logic synthesis, place and route algorithms to get a physical layout. See electronic design automation and hardware description language for many more details on this subject.